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Western Digital crams four bits per cell on 3D NAND; calls it BiCS3 X4 technology

Western Digital crams four bits per cell on 3D NAND; calls it BiCS3 X4 technology

by Vyncent ChanJuly 28, 2017
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Western Digital has previously announced their BiCS4 with TLC and QLC architectures. The latest bit of news informs us that Western Digital has also successfully brought QLC (Western Digital calls it X4) to their 64-layer 3D NAND BiCS3 technology.

Western Digital has previously developed X4 for 2D NAND and commercialized it, so this bit of news comes as no surprise with Western Digital’s deep vertical intergration capabilities. With BiCS3 X4, Western Digital is capable of reaching an industry-leading density of 768Gb per chip, a 50% increase from the previous maximum of 512Gb per chip with TLC (or as Western Digital calls it, X3) technology.

BiCS3 X4 promises to deliver performance comparable to their BiCS3 X3 products, with the technology to benefit consumers who want to take advantage of the higher capacities made possible by the higher density offered by X4 technology.

BiCS3 X4 chips is set to be used in removable drives and solid state drives, with Western Digital planning on showcasing products based on the technology at the Flash Memory Summit in August.

Pokdepinion: With TLC gaining wide acceptance now despite fears of poor endurance in the beginning, it’s only a matter of time before QLC is found in your everyday NAND chips.

About The Author
Vyncent Chan
Technology enthusiast, casual gamer, pharmacy graduate. Strongly opposes proprietary standards and always on the look out for incredible bang-for-buck.

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