Intel Nova Lake May Feature A Special Variant Aimed At AMD’s 3D V-Cache CPUs

Low Boon Shen
3 Min Read

Intel hasn’t been able to compete against AMD Ryzen processors for several years by now, in no small part due to the latter’s significant advantage thanks to the 3D V-Cache technology. Now, it looks like Intel finally has an answer for it by making its very own version, set to be introduced under Nova Lake family.

Intel Nova Lake “BLLC”

In case you didn’t know, AMD’s 3D V-Cache is a 3D stacking technology that gave Ryzen and EPYC CPUs significant amounts of cache by stacking additional caches on top of the silicon, which triples the amount of L3 cache on a single 8-core die over a standard counterpart. This additional amount of cache allows memory-sensitive workloads – often games – to have massive performance boost, which Intel practically had no answers for.

Intel Nova Lake May Feature A Special Variant Aimed At AMD's 3D V-Cache CPUs
Intel Nova Lake May Feature A Special Variant Aimed At AMD's 3D V-Cache CPUs

Now, according to leaker Raichu and Haze on X (Twitter), Intel is building special variants of its Nova Lake chips referred as “BLLC”, or Big Last-Level Cache. The premise of such design is to introduce significantly larger amounts of what will presumably be L3 cache to allow these Nova Lake chips to have similar effect as AMD’s X3D counterparts, and it is speculated that as much as 144MB of cache can be fit within the said chip.

Specifically, leakers say BLLC will not be introduced to the Nova Lake flagship with 16P+32E cores; instead, mid-range models with 8P+16E and 8P+12E will be the primary candidates for this design. These chips will also be equipped with four Low Power E-cores, all while sticking to the 125W base TDP, which is the same as K-series processors today. Unlike AMD’s implementation, BLLC is said to not be a stacked component, so it will likely cost a significant die area for the silicon involved, which may incur performance and latency penalties of its own.

Fun fact: Intel actually tried this idea 10 years ago with the Broadwell-C series processors, which had 128MB of L4 cache acting as the intermediary between L3 cache and system memory. The idea remains the same – to keep as much data into the super-fast cache as possible to improve performance, although the execution didn’t quite stick at the time (with little to no CPU performance gain), so it was scrapped moving forward.

Pokdepinion: Nova Lake is looking very promising at this rate.

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